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Ordering number :EN5452A
Monolithic Digital IC
LB1955
Three-Phase Brushless Motor Driver
Functions
* The LB1955 is a 3-phase brushless motor driver IC that is optimal for applications such as driving the drum motor in VCRs.
Package Dimensions
unit: mm 3222-HSOP28
[LB1955]
Features
* * * * * Current linear drive FG and PG free Single-voltage power supply Built-in AGC circuit Built-in thermal shutdown circuit
28
15
5.6
1.0 0.2 0.1
1
0.8 2.7 0.3
14
15.2
0.8
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter Maximum supply voltage Maximum output current Allowable power dissipation Operating temperature Storage temperature Symbol VCCmax IOUT Pdmax Topr Tstg Independent device Conditions Ratings 14.5 1.0 0.60 -20 to +75 -55 to +150 Unit V A W C C
Allowable Operating Ranges at Ta = 25C
Parameter Supply voltage Hall input amplitude VC input voltage Symbol VCC Vhall VC At the input Conditions Ratings 10.2 to 13.8 70 to 500 0 to 5 Unit V mVp-p V
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
41399TH (OT) / 73097HA (OT) No. 5452-1/9
1.8max
SANYO: HSOP28
0.5
7.6
LB1955 Electrical Characteristics at Ta = 25C, VCC = 12 V
Parameter [Power Supply] Current drain IC internal power supply [Output] Output saturation voltage VO(sat)1 VO(sat)2 Ior IO = 400 mA VC = 5 V, Rf = 0 IO = 800 mA VC = 5 V, Rf = 0 IO = 100 mA, Rf = 0.47 Sink side Source side Sink side Source side -5 0.4 1.5 0.7 2.0 +5 V V V V % ICC VREF VC = 0 V, LCTR = 6 V 7.0 4.75 10.0 5.0 13.0 5.25 mA V Symbol Conditions Ratings min typ max Unit
Output saturation voltage 2 3-phase output current ripple [Hall Amplifier] Input offset voltage Input bias current Common-mode input voltage range [Control] VC pin input bias current Control start voltage
VHoff IHb VHCM IVCb VTHVC GMVC VC = 0 V Rf = 0.47 , IO 10 mA With the Hall input logic fixed Rf = 0.47 , IO = 200 mA With the Hall input logic fixed and VG shorted to RF VAGC = 1.4 V UIN VIN, WIN
-20
+20 10 5
mV A A V
2.2
5.0
-10 2.25
-1.3 2.5 2.75
A V
Open-loop control gain [PG] PG Hall amplifier input offset voltage Peak hold charge current PG comparator threshold PG output high-level voltage PG leakage current [FG] Back emf Schmitt input hysteresis width Ringing canceller Schmitt input hysteresis width FG output high-level voltage FG leakage current [TSD] Thermal shutdown operating temperature Thermal shutdown temperature hysteresis width
0.72
0.9
1.08
A/V
VPGoff ISHCHG THPG VPGH ILEAKPG
Design target (U, V, W) = (L, L, H) SH = 1000pF, Design target*
-10 30 113 4.5 -10 0 117
+10
mV A
121 5.2 +10
% V A
VSCHG
In the back emf Schmitt input increasing direction, Design target In the back emf Schmitt input decreasing direction, Design target
100 0 180 -20 4.5 -10 0 0 +20 5.2 +10
mV mV mV mV V A
VSCHR VFGH ILEAKFG
In the Schmitt input increasing direction, Design target In the Schmitt input decreasing direction, Design target FGR = 0 V
TTSD TSD
Design target
180
C
Design target
15
C
Note: * is provided for when X is the peak value at the 60 position of the lower side of the UIN1 Hall amplifier input: THPG = 1.17X. However, note that the THPG level may be reduced if the value of the capacitor (SH) used for the sample-and-hold circuit is too small since a discharge current of a few nA will result.
No. 5452-2/9
LB1955
Allowable power dissipation, Pd max - W
Ambient temperature, Ta - C
Pin Assignment
WIN2 WIN1 UIN2 UIN1 VIN2 VIN1
Pin Functions
Pin No. 23, 24 25, 26 27, 28 16 15 13 11 9 10 8 14 1 2 3 4 5 6 7 18 22 12, 17, 19 20, 21 Pin UIN1, UIN2 VIN1, VIN2 WIN1, WIN2 UOUT VOUT WOUT LCTR VCC VREF GND Rf VG FC LIM VC PG FG FGR SH AGC NC U phase Hall element input V phase Hall element input W phase Hall element input U phase output V phase output W phase output Pin connected to the center points of the coils that are Y-connected to the U, V, and W outputs. Power supply Reference voltage output GND Output current detection Closed loop control gain switching Speed control loop frequency characteristics correction Output current limit setting Speed control PG waveform output FG waveform output (FGR shorted to GND) PG/FG synthesized output (FGR shorted to PG) PG waveform sample-and-hold circuit capacitor connection Connection for the capacitor used by the AGC circuit, which holds the input gain at a fixed level. No connection Function
No. 5452-3/9
LB1955 Truth Table
Source sink 1 2 3 4 5 6 W phase V phase W phase U phase V phase U phase V phase W phase U phase W phase U phase V phase Hall input logic U H H H L L L V H L L L H H W L L H H H L
Note: The Hall input "H" and "L" values are defined as follows: "H" means that for that phase the (+) input is higher than the (-) input, and "L" means that for that phase the (+) input is lower than the (-) input. However, note that an input potential difference corresponding to the Hall to output gain is required.
Timing Charts
Hall inputs
Synthesized waveform
Note: The Hall inputs are defined as follows: U = UIN1 - UIN2, V = VIN1 - VIN2, and W = WIN1 - WIN2. Inputs to the Hall input pins must be applied in the phase order shown in the timing chart.
No. 5452-4/9
LB1955 Recommended Special Magnetization Waveforms
B A < 7/6 x B 8/6 x D C 10/6 x D
Note: Note that the intersections between the special magnetization and general waveforms and the intersections between pairs of general waveforms must be set up to be 30 apart.
Hall Input Order
Hall input
Note: The Hall input order must be set up to be W V U.
No. 5452-5/9
LB1955 VG and LIM Pin Usage
Output stage LIM pin: Open VG - Rf: Shorted Gm = 0.423/Rf (A/V) (Closed loop control gain) Ilim = (VREF x 27/200 - 0.2) x 4.23/3/Rf (Current limit) VG pin: Open Gm = 1/Rf (A/V) (Closed loop control gain) Ilim = (VREF x27/200 - 0.2) x10/3/Rf (Current limit) LIM - VREF: Shorted No current limit.
Note: This current limiting function is for protection against unusual and abnormal currents. If a current limit level below the rated current is set, this will, inversely, result in heat generation within the IC. When the LIM pin is open, VG is shorted to Rf, and Rf = 0.47 , this will result in a current limit level of about 1.3 to 1.4 A. If this limit falls under the rated value due to mode changes or changes in the value of the Rf resistor, set the current limit to an appropriate value by applying to the LIM pin a voltage that is divided from the VREF to ground potential by resistors of a few k. Alternatively, short the LIM pin to VREF to defeat the current limit function.
PG and FG Pin Output Circuits
FG (FGR shorted to ground)
PG (FGR shorted to PG)
No. 5452-6/9
LB1955 Block Diagram
UIN1 UIN2 VIN1 VIN2 WIN1 WIN2 Hall input synthesis block (linear matrix) 3-phase differential distribution circuit
FG waveform synthesis
PG waveform synthesis
Power transistors Internal power supply
No. 5452-7/9
LB1955 Sample Application Circuit
WIN2
WIN1
UIN1
UIN2
VIN2
VIN1
LB1955
0 to 5 V
No. 5452-8/9
LB1955
Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of April, 1999. Specifications and information herein are subject to change without notice. PS No. 5452-9/9

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